Data communications systems which include more than one communications subsystem typically utilize a serial crossbar switch to functionally interconnect the subsystems. A serial crossbar switch is a hardware device which permits high-speed serialized data communication between attached subsystems. The switch physically attaches to each subsystem by means of an input/output (I/O) port comprising an individual pair of optical fibers or wires. One of the pair of fibers or wires for each subsystem is used for transmitting information to other systems through the switch, and the other is used for receiving information from other systems via the switch.
The internal switching fabric of the serial crossbar switch provides for connections between any two connected subsystems. The subsystems communicate with each other over these connections, which logically establish communications paths between the transmit wire of a source (or calling) subsystem with a receive wire of a destination (or called) subsystem. In this manner, the switching fabric of the serial crossbar switch provides internal connection crosspoints which eliminate connection blocking. Connections between more than one pair of subsystems may exist concurrently. This concurrency gives the serial crossbar switch a significant performance advantage over single threaded interconnects such as serial ring networks, wherein only one connection between subsystems is permitted at a time.
Conventional serial crossbar switch designs operate on the basis of full duplex connectivity. In a full duplex connection, the switch logically connects the transmit wire of the calling subsystem to the receive wire of the called subsystem, while simultaneously logically connecting the transmit wire of the called subsystem to the receive wire of the calling subsystem. In this manner, each subsystem has a simultaneous communication path to and from the other connected subsystem in which to transfer information. One disadvantage of full duplex connectivity, however, is that communications between the subsystems is unidirectional along the separate transmit and receive paths. Data is transmitted along the transmit wire of the calling subsystem to the receive wire of the called subsystem, with only an occasional link-level data acknowledgment message sent in return along the transmit wire of the called subsystem to the receive wire of the calling subsystem. This underutilization of the reverse data path in a full duplex connection results in wasting nearly half of the potential throughput capacity of a serial crossbar switch. The wasted throughput capacity of a full duplex switch design may be recovered if a switch is instead designed to operate on the basis of simplex connectivity. In a simplex connection, a switch logically connects the transmit wire of the calling subsystem to the receive wire of the called subsystem. However, unlike the full duplex connection, a simplex connection does not provide a separate reverse path for returning messages. Messages addressed to the called subsystem may be received by the called subsystem from other subsystems on its receive link, and messages sent by the calling subsystem may be sent to other subsystems on its transmit link. The transmit link of the called subsystem is available to allow the called subsystem to establish connections with other subsystems, while at the same time, the receive link of the calling subsystem is available to allow connections to the calling subsystem from other subsystems.
The information carried by the transmit and receive links of the subsystems attached to the simplex switch includes data and control messages, which include connect and disconnect requests, connect and disconnect request acknowledgments, and data acknowledgments. For example, prior to sending data, calling subsystems request connections to (and subsequent disconnections from) other called subsystems via the switch by sending serially encoded connect request and disconnect request link-level control messages to the called subsystems. The called subsystem responds to the calling subsystem request by either acknowledging or not acknowledging the request. In addition, data acknowledgment messages (or error messages) are sent by a called subsystem to a calling subsystem after a data transfer sequence has been completed. Because a data acknowledgment message from the called subsystem indicates to the calling subsystem whether or not data has been lost during transmission, a data sequence transmission cannot be considered to have been successfully completed until the calling subsystem receives positive acknowledgment messages for each transmitted data sequence.
Because a simplex switch does not allocate independent reverse connection paths, a different technique must be provided to route the required connect and disconnect request acknowledgments and the data acknowledgments from a called subsystem to a calling subsystem. One preferred approach is to provide a packet switched network to route connect and disconnect request acknowledgments and the data acknowledgments to the appropriate subsystems without establishing connections between the subsystems, and a separate circuit switched network for connect and disconnect processing. The packet switched network routes control messages without establishing connections between the subsystems by a store-and forward technique wherein connect and disconnect request acknowledgments and data acknowledgments are temporarily stored in buffers in the switch prior to delivery to the appropriate subsystem. This store-and-forward packet switching method is advantageous because of the speed advantage achieved by eliminating the switching time delays associated with establishing switch connections.
In the typical hardware design of a simplex switch provided with circuit switched connect and disconnect requests, switch I/O ports respond to attached subsystem requests for connections and disconnections to other subsystems by generating operation requests to a common control bus within the switch which only processes circuit switched operations. However, because the I/O ports on the switch operate concurrently with each other, multiple I/O ports may simultaneously have request operations pending over the common circuit switching control bus, thereby creating servicing conflicts which the control bus must resolve.
In the typical hardware design of a simplex switch provided with packet switching of connect and disconnect request acknowledgments and data acknowledgments, switch I/O ports initiate subsystem-to-subsystem message routing by generating requests to access a common control bus which is provided for routing only packet switched messages. As with connection processing, it is possible for multiple ports to have simultaneously pending requests for access to the packet switching control bus and create conflicts which this control bus must resolve. Typically, as is the case with the circuit switching control bus, the requests are processed either in the order in which received or in round robin fashion.
Switching performance deteriorates, however, if no ordered sequencing scheme is provided for processing control bus access requests in a simplex switch, because an arbitrary sequencing scheme ignores more efficient manners in which to coordinate the granting of competing requests. It is an object of the present invention, then, to provide a priority scheme for sequencing bus operations in a simplex switch having separate packet switching and circuit switching control buses to maximize switch throughput performance.